Method for producing multilayer circuit board for semiconductor device
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United States of America Patent
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-
Jan 24, 2006
Grant Date -
Apr 22, 2004
app pub date -
Oct 29, 2002
filing date -
Oct 31, 2001
priority date (Note) -
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Abstract
The invention relates a method for producing a multilayer circuit board (50) for a semiconductor device, comprising using a composite metal sheet (14) in which two metal sheets are combined, forming, on each side of the composite metal sheet, pads for connecting to a semiconductor element, the pads being made of a metal material which is substantially not etched by an etchant for the metal sheet, and an insulating layer having openings exposing the pads, forming, on the insulating layer, a wiring line layer (26) connected to the pads and having pads for connecting to another wiring line layer to be subsequently formed, subsequently fabricating a multilayer circuit board body (20) by necessary numbers of insulating layers and wiring line layers alternately formed, forming, on the outermost insulating layer of the multilayer circuit board body, an insulating layer provided with through-holes exposing pads for external connecting terminals, which are located on the outermost insulating layer, then dividing the composite metal sheet, to yield intermediates (34) each provided on one side of the metal sheet with the multilayer circuit board body, and etching the metal sheet at an area at which a semiconductor element is to be mounted to remove the material of the metal sheet at that area, to thereby form a frame (10) surrounding the area for the mounting of the semiconductor element.
First Claim
Family
- 15 United States
- 10 France
- 8 Japan
- 7 China
- 5 Korea
- 2 Other
Patent Owner(s)
- SHINKO ELECTRIC INDUSTRIES CO., LTD.
International Classification(s)
Inventor(s)
Inventor Name | Address | # of filed Patents | Total Citations |
---|---|---|---|
Aratani, Hironari | Nagano, JP | 4 | 95 |
Chino, Takeshi | Nagano, JP | 6 | 126 |
Kodaira, Tadashi | Nagano, JP | 16 | 203 |
Matsumoto, Shunichiro | Nagano, JP | 29 | 287 |
Nakamura, Jyunichi | Nagano, JP | 9 | 152 |
Shimada, Kiyotaka | Nagano, JP | 7 | 105 |
Tabuchi, Takanori | Nagano, JP | 10 | 126 |
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Maintenance Fees
Fee | Large entity fee | small entity fee | micro entity fee | due date |
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Fee | Large entity fee | small entity fee | micro entity fee |
---|---|---|---|
Surcharge after expiration - Late payment is unavoidable | $700.00 | $350.00 | $175.00 |
Surcharge after expiration - Late payment is unintentional | $1,640.00 | $820.00 | $410.00 |
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