Semiconductor package including passive elements and method of manufacture
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United States of America Patent
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Feb 7, 2006
Grant Date -
Oct 3, 2002
app pub date -
Mar 25, 2002
filing date -
Apr 2, 2001
priority date (Note) -
In Force
status (Latency Note)
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Abstract
A semiconductor package including passive elements and a method of manufacturing provide reduced package size, improved performance and higher process yield by mounting the passive elements beneath the semiconductor die on the substrate. The semiconductor die may be mounted above the passive elements by mechanically bonding the semiconductor die to the passive elements, mounting the passive elements within a recess in the substrate or mounting the semiconductor using an adhesive retaining wall on the substrate that protrudes above and extends around the passive elements. The recess may include an aperture through the substrate to vent the package to the outside environment or may comprise an aperture through the substrate and larger than the semiconductor die, permitting the encapsulation to entirely fill the aperture, covering the die and the passive elements to secure them mechanically within the package.
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