Substrate for carrying a semiconductor chip and a manufacturing method thereof

United States of America Patent

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Feb 14, 2006
Grant Date
May 6, 2004
app pub date
Oct 24, 2003
filing date
Oct 29, 2002

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Abstract

A substrate includes a plurality of insulation layers forming a laminated structure and a built-in capacitor formed in the laminated structure, wherein the laminated structure includes a layer of baked organic polysilane.

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Patent Owner	Address
SHINKO ELECTRIC INDUSTRIES CO LTD	NAGANO

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H01L:SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICE....

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Inventor Name	Address	# of filed Patents	Total Citations
Horikawa, Yasuyoshi	Nagano, JP	37	484
Ooi, Kiyoshi	Nagano, JP	14	183

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Substrate for carrying a semiconductor chip and a manufacturing method thereof

Number of patents in Portfolio can not be more than 2000

United States of America Patent

10693216

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PATENT NO	6998308
APP PUB NO	20040087058A1
SERIAL NO	10693216
DOCKET NO

US Family Size	Non-US Coverage
Patent Longevity	Forward Citations

DATE PUBLISHED	PUBLICATION/PATENT NO.	PUBLICATION TYPE
February 14, 2006	US,6998308,B2 US6998308B2	GRANTED PATENT AS SECOND PUBLICATION
May 06, 2004	US,20040087058,A1 US20040087058A1	FIRST PUBLISHED PATENT APPLICATION

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10693216

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