Test system for bumped semiconductor components

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United States of America Patent

PATENT NO 7002362
SERIAL NO

10832483

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Abstract

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An interconnect for testing semiconductor components includes a substrate, and contacts on the substrate for making temporary electrical connections with bumped contacts on the components. Each contact includes a recess and a pattern of leads cantilevered over the recess configured to electrically engage a bumped contact. The leads are adapted to move in a z-direction within the recess to accommodate variations in the height and planarity of the bumped contacts. In addition, the leads can include projections for penetrating the bumped contacts, a non-bonding outer layer for preventing bonding to the bumped contacts, and a curved shape which matches a topography of the bumped contacts. The leads can be formed by forming a patterned metal layer on the substrate, by attaching a polymer substrate with the leads thereon to the substrate, or be etching the substrate to form conductive beams.

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Patent Owner(s)

Patent OwnerAddress
MICRON TECHNOLOGY INCIDAHO IDAHO

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Akram, Salman Boise, ID 801 30978
Farnworth, Warren M Nampa, ID 855 33798

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