Semiconductor device for reducing the number of probing pad used during wafer test and method for testing the same
Number of patents in Portfolio can not be more than 2000
United States of America Patent
Stats
-
Feb 21, 2006
Grant Date -
Dec 23, 2004
app pub date -
Dec 17, 2003
filing date -
Jun 23, 2003
priority date (Note) -
In Force
status (Latency Note)
Importance
Abstract
The present invention relates to a semiconductor device and a method for testing the same capable of reducing the number of probing pads used during wafer test. The semiconductor device includes a select circuit connected between a plurality of internal circuits to be tested and a single probing pad, for transmitting test signals inputted from the probing pads to any one of the plurality of the internal circuits according to a test mode signal generated in a wafer test mode. It is possible to reduce the number of the probing pads in the integrated circuit used for connection to a probe for contact of a probe card during wafer test. It is therefore possible to reduce test time.
First Claim
Family
International Classification(s)
Cited Art Landscape
Patent Citation Ranking
Advertisement
Advertisement
Advertisement
Recipient Email Address
Recipient Email Address
Comment
Recipient Email Address
Add to Portfolio(s)
To add this patent to one, or more, of your portfolios, simply click the add button.
This Patent is in these Portfolios:
Add to additional portfolios:
Last Refreshed On:
Changes done successfully