Programming flash memories
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United States of America Patent
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Feb 28, 2006
Grant Date -
Oct 6, 2005
app pub date -
May 24, 2005
filing date -
Dec 26, 2002
priority date (Note) -
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Abstract
A flash memory device has an array of flash memory cells, a detector for detecting an external voltage applied to the flash memory device, and a command control circuit for controlling access to the array of flash memory cells. The command control circuit is adapted to perform a method of programming one or more of the flash memory cells when the external voltage exceeds a predetermined value and when the command control circuit receives a program command. The method includes, in response to the program command and the detected external voltage, applying an internally-generated programming voltage to a control gate of the one or more flash memory cells and applying a voltage pulse to a drain of the one or more flash memory cells while the control gate is at the internally-generated programming voltage.
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