Shared embedded trace macrocell
Number of patents in Portfolio can not be more than 2000
United States of America Patent
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Feb 28, 2006
Grant Date -
N/A
app pub date -
Nov 16, 2001
filing date -
Nov 16, 2001
priority date (Note) -
In Force
status (Latency Note)
Importance
Abstract
An apparatus generally comprising a plurality of processors, a trace circuit, and a connector circuit. The trace circuit may be configured to present information at a port for debugging software in a selected processor of the processors. The connector circuit may be configured to (i) couple the trace circuit to the selected processor in response to a select signal and (ii) transfer the information from the selected processor to the trace circuit while the selected processor is executing the software.
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