Resonant clock distribution for very large scale integrated circuits
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United States of America Patent
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Mar 21, 2006
Grant Date -
Mar 17, 2005
app pub date -
Jul 26, 2004
filing date -
Jan 13, 2003
priority date (Note) -
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Abstract
A circuit for distributing a clock signal in an integrated circuit includes a capacitive clock distribution circuit having at least conductor therein. At least one inductor is formed in a metal layer of the integrated circuit and is coupled to the clock distribution circuit. The inductor, generally in the form of a number of spiral inductors distributed throughout the integrated circuit, provides an inductance value selected to resonate with the capacitive clock distribution circuit. By operating the clock distribution circuit at resonance, power dissipation is reduced while skew and jitter performance can be improved.
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