Method for initializing a system including a host and plurality of memory modules connected via a serial memory interconnect
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United States of America Patent
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Mar 21, 2006
Issued Date -
N/A
app pub date -
May 10, 2004
filing date -
May 13, 2003
priority date (Note) -
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Abstract
A host is coupled to a serially connected chain of memory modules. In one embodiment, a method for initializing the host and each of memory modules includes the host transmitting a first synchronization pattern and a second synchronization pattern downstream in response to a reset condition. The method also includes each memory module in the serially connected chain of memory modules receiving and forwarding the first and the second synchronization pattern. Each memory module receives and forwards the first and the second synchronization pattern. Further, the method includes the host transmitting a plurality of NOP packets downstream in response to transmitting the second synchronization pattern. Lastly, the method includes a portion of the memory modules injecting and transmitting NOP packets upstream in response to receiving the second synchronization pattern from downstream.
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