Chip management system
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United States of America Patent
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Apr 4, 2006
Issued Date -
N/A
app pub date -
Nov 20, 2002
filing date -
Nov 20, 2002
priority date (Note) -
In Force
status (Latency Note)
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Abstract
A method and system for automatically guiding a user through a design flow for an integrated circuit are disclosed. The method and system include displaying a design flow user interface on a user's computer, where the user interface includes symbols corresponding to design flow process steps. The design flow process steps are defined with a set of rules, and user input for each step is analyzed for compliance with the rules. The user is allowed to proceed to a next step in the flow once it is determined that the previous steps have been completed successfully.
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