Programmable self-calibrating vernier and method
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United States of America Patent
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Apr 11, 2006
Grant Date -
Dec 26, 2002
app pub date -
May 21, 2002
filing date -
May 21, 2001
priority date (Note) -
Expired
status (Latency Note)
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Abstract
The present invention relates in general to the field of generation of precise electrical signals, in particular, to a technique for providing accurate delays of signals using a controllable delay line, and is applicable to the areas of high speed communication and memory testing equipment. According to the present invention, an auxiliary reference channel having a delay line which is identical to the main delay line is incorporated into vernier silicon die to allow automatic adjustment of the delay in the main delay line using a reference periodical signal applied to the auxiliary delay line.
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