Active block write-back from SRAM cache to DRAM
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United States of America Patent
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Apr 11, 2006
Grant Date -
Aug 28, 2003
app pub date -
Feb 28, 2002
filing date -
Feb 28, 2002
priority date (Note) -
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Abstract
An external cache management unit for use with 3D-RAM and suitable for use in a computer graphics system is described. The unit maintains and tracks the status of level one cache memory in the 3D-RAM. The unit identifies dirty blocks of cache memory and prioritizes block cleansing based on a least used algorithm. Periodic block cleansing during empty memory cycles is provided for, and may also be prompted on demand.
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