Measure controlled delay with duty cycle control
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United States of America Patent
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Apr 11, 2006
Issued Date -
N/A
app pub date -
Aug 22, 2002
filing date -
Aug 22, 2002
priority date (Note) -
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status (Latency Note)
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Abstract
The disclosed embodiments relate to circuits that produce synchronized output signals. An input signal is received and used to produce a delayed input signal. The period of the input signal and the phase difference between the input signal and the delayed input signal are measured. The period of the input signal and the phase difference between the input signal and the delayed input signal are used to construct an output signal.
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