Memory system with channel multiplexing of multiple memory devices
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United States of America Patent
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May 2, 2006
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N/A
app pub date -
Oct 20, 2003
filing date -
Jul 23, 1999
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Abstract
A high-speed memory system is disclosed in which a single command effects control over either a single memory device or a plurality of memory devices depending on a present mode of operation. Such control may effect data transfer between the one or more memory devices and a memory controller, as well as operating state transitions or power mode transitions for the memory devices. Similarly, various configurations of relatively low bandwidth memory devices respond as a selectively controllable group to transmit or receive high bandwidth data.
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