Efficient time-division multiplexed addressing protocol

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United States of America Patent

PATENT NO 7042863
SERIAL NO

09524326

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Abstract

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A method and apparatus for communicating within a system including a master unit and one or more slave units is disclosed herein. A member address, corresponding to a selected time slot of a plurality of time slots defined by a system clock configured to repeat in cycles, is assigned to a first slave unit. The first slave unit is also assigned a first extended address associated with an occurrence of the designated time slot within at least a selected one of the cycles. After being polled by the master unit during an immediately preceding time slot, the first slave unit transmits information thereto during the designated selected time slot within the selected cycle. A second slave unit may also be assigned the member address and a second extended address associated with a different occurrence of the selected time slot within one or more of the cycles. The second slave unit is disposed to transmit information during such different occurrence of the selected time slot.

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Patent Owner(s)

Patent OwnerAddress
AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE LIMITEDSINGAPORE 768923

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Morris, Martin Vista, CA 20 381

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