Chip-on-chip connection with second chip located in rectangular open window hole in printed circuit board
Number of patents in Portfolio can not be more than 2000
United States of America Patent
Stats
-
May 16, 2006
Grant Date -
Jul 10, 2003
app pub date -
Feb 21, 2003
filing date -
May 19, 2000
priority date (Note) -
In Force
status (Latency Note)
Importance
Abstract
A chip package for semiconductor chips is provided by the method of forming a chip package includes the steps of forming a printed circuit board with a window therethrough; forming semiconductor chip connections of one or more primary chips which overlie the window to the printed circuit board by solder connections, locating a suspended semiconductor chip within the window, and connecting the suspended semiconductor chip to one or more primary chips overlying the window in a chip-on-chip connection. A bypass capacitor is formed on the printed circuit board.
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