US Patent No: 7,046,568

Number of patents in Portfolio can not be more than 2000

Memory sensing circuit and method for low voltage operation

ALSO PUBLISHED AS: 20050169082

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Abstract

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A sensing module operates with a sense amplifier sensing a conduction current of a memory cell via a coupled bit line under constant voltage condition in order to minimize bit-line to bit-line coupling. The rate of discharge of a dedicated capacitor as measured by a change in the voltage drop there across in a predetermined period is used to indicate the magnitude of the conduction current. The voltage cannot drop below a minimum level imposed by a circuit for maintaining the constant voltage condition on the bit line. A voltage shifter is used to boost the voltage during the discharge and to unboost the voltage after the discharge, so that the change in voltage drop properly reflects the rate of discharge without running into the minimum level.

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Patent Owner(s)

Patent OwnerAddressTotal Patents
SANDISK TECHNOLOGIES INC.PLANO, TX1905

International Classification(s)

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Cernea, Raul-Adrian Santa Clara, CA 163 4723

Cited Art Landscape

Patent Info (Count) # Cites Year
 
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SANDISK TECHNOLOGIES INC. (6)
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SANDISK CORPORATION (2)
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CYPRESS SEMICONDUCTOR CORPORATION (1)
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Datalight, Inc. (1)
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FUJITSU LIMITED (1)
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NEC ELECTRONICS CORPORATION (1)
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RADIANT TECHNOLOGIES, INC. (1)
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SANDISK 3D LLC (1)
6,407,953 Memory array organization and related test method particularly well suited for integrated circuits having write-once memory arrays 147 2001
 
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SHARP KABUSHIKI KAISHA (1)
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SONY CORPORATION (1)
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SPANSION LLC (1)
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TEXAS INSTRUMENTS INCORPORATED (1)
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* Cited By Examiner

Patent Citation Ranking

Forward Cite Landscape

Patent Info (Count) # Cites Year
 
SANDISK TECHNOLOGIES INC. (119)
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7,480,181 Non-volatile memory with background data latch caching during read operations 11 2006
7,463,521 Method for non-volatile memory with managed execution of cached data 21 2006
7,447,078 Method for non-volatile memory with background data latch caching during read operations 16 2006
7,376,030 Memory sensing circuit and method for low voltage operation 8 2006
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7,691,710 Fabricating non-volatile memory with dual voltage select gate structure 4 2006
7,616,490 Programming non-volatile memory with dual voltage select gate structure 5 2006
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7,468,911 Non-volatile memory using multiple boosting modes for reduced program disturb 75 2006
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7,696,035 Method for fabricating non-volatile memory with boost structures 3 2006
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7,583,535 Biasing non-volatile storage to compensate for temperature variations 16 2006
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7,447,081 Methods for improved program-verify operations in non-volatile memories 18 2007
7,545,678 Non-volatile storage with source bias all bit line sensing 3 2007
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7,532,516 Non-volatile storage with current sensing of negative threshold voltages 2 2007
7,489,554 Method for current sensing with biasing of source and P-well in non-volatile storage 2 2007
7,471,567 Method for source bias all bit line sensing in non-volatile storage 8 2007
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7,894,269 Nonvolatile memory and method for compensating during programming for perturbing charges of neighboring cells 4 2007
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7,609,556 Non-volatile memory with improved program-verify operations 3 2007
7,463,528 Temperature compensation of select gates in non-volatile memory 14 2007
7,460,407 Temperature compensation of voltages of unselected word lines in non-volatile memory based on word line position 4 2007
7,764,547 Regulation of source potential to combat cell source IR drop 5 2007
7,701,761 Read, verify word line reference voltage to track source level 3 2007
* 7,593,265 Low noise sense amplifier array and method for nonvolatile memory 8 2007
7,468,921 Method for increasing programming speed for non-volatile memory by applying direct-transitioning waveforms to word lines 0 2008
7,593,277 Method for compensated sensing in non-volatile memory 1 2008
7,495,956 Reducing read disturb for non-volatile storage 11 2008
7,447,065 Reducing read disturb for non-volatile storage 10 2008
7,440,318 Reducing read disturb for non-volatile storage 11 2008
7,577,026 Source and drain side early boosting using local self boosting for non-volatile storage 0 2008
7,606,076 Sensing in non-volatile storage using pulldown to regulated source voltage to remove system noise 6 2008
7,915,664 Non-volatile memory with sidewall channels and raised source/drain regions 0 2008
8,051,240 Compensating non-volatile storage using different pass voltages during program-verify and read 1 2008
7,719,902 Enhanced bit-line pre-charge scheme for increasing channel boosting in non-volatile storage 2 2008
7,957,197 Nonvolatile memory with a current sense amplifier having a precharge circuit and a transfer gate coupled to a sense node 3 2008
7,499,324 Non-volatile memory and method with control gate compensation for source line bias errors 6 2008
7,800,956 Programming algorithm to reduce disturb with minimal extra time penalty 10 2008
7,796,430 Non-volatile memory using multiple boosting modes for reduced program disturb 4 2008
7,733,703 Method for non-volatile memory with background data latch caching during read operations 2 2008
7,751,244 Applying adaptive body bias to non-volatile storage based on number of programming cycles 3 2008
8,130,552 Multi-pass programming for memory with reduced data storage requirement 0 2008
7,633,802 Non-real time reprogramming of non-volatile memory to achieve tighter distribution of threshold voltages 77 2008
7,936,602 Use of data latches in cache operations of non-volatile memories 1 2009
7,852,678 Non-volatile memory with improved sensing by reducing source line current 4 2009
7,978,526 Low noise sense amplifier array and method for nonvolatile memory 4 2009
8,284,606 Compensating for coupling during programming 0 2009
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8,054,681 Read, verify word line reference voltage to track source level 0 2010
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8,036,041 Method for non-volatile memory with background data latch caching during read operations 6 2010
* 8,050,126 Non-volatile memory with improved sensing by reducing source line current 0 2010
8,472,280 Alternate page by page programming scheme 3 2010
8,468,424 Method for decoding data in non-volatile storage using reliability metrics based on multiple reads 0 2011
8,400,839 Nonvolatile memory and method for compensating during programming for perturbing charges of neighboring cells 0 2011
8,169,831 High speed sense amplifier array and method for non-volatile memory 2 2011
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8,164,957 Reducing energy consumption when applying body bias to substrate having sets of nand strings 0 2011
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KABUSHIKI KAISHA TOSHIBA (10)
7,365,018 Fabrication of semiconductor device for flash memory with increased select gate width 6 2005
7,692,987 Semiconductor storage device 2 2008
8,009,470 Nonvolatile semiconductor memory 6 2009
8,203,888 Non-volatile semiconductor storage device 4 2010
8,223,543 Nonvolatile semiconductor memory 1 2011
8,649,223 Semiconductor storage device 0 2012
8,787,087 Semiconductor memory device controlling operation timing of the sense circuit 0 2012
8,477,534 Nonvolatile semiconductor memory 3 2012
8,559,222 Nonvolatile semiconductor memory 0 2013
8,750,039 Nonvolatile semiconductor memory 0 2013
 
SANDISK IL LTD. (4)
7,679,965 Flash memory with improved programming precision 2 2007
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MICRON TECHNOLOGY, INC. (2)
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SANDISK CORPORATION (1)
8,542,529 Non-volatile memory and method with power-saving read and program-verify operations 0 2012
* Cited By Examiner

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