US Patent No: 7,046,568

Number of patents in Portfolio can not be more than 2000

Memory sensing circuit and method for low voltage operation

ALSO PUBLISHED AS: 20050169082
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Abstract

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A sensing module operates with a sense amplifier sensing a conduction current of a memory cell via a coupled bit line under constant voltage condition in order to minimize bit-line to bit-line coupling. The rate of discharge of a dedicated capacitor as measured by a change in the voltage drop there across in a predetermined period is used to indicate the magnitude of the conduction current. The voltage cannot drop below a minimum level imposed by a circuit for maintaining the constant voltage condition on the bit line. A voltage shifter is used to boost the voltage during the discharge and to unboost the voltage after the discharge, so that the change in voltage drop properly reflects the rate of discharge without running into the minimum level.

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First Claim

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Patent Owner(s)

Patent OwnerAddressTotal Patents
SANDISK TECHNOLOGIES INC.PLANO, TX1939

International Classification(s)

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Cernea, Raul-Adrian Santa Clara, CA 163 4766

Cited Art Landscape

Patent Info (Count) # Cites Year
 
SHARP KABUSHIKI KAISHA (1)
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CYPRESS SEMICONDUCTOR CORPORATION (1)
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SONY CORPORATION (1)
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SPANSION LLC (1)
6,504,757 Double boosting scheme for NAND to improve program inhibit characteristics 60 2001
 
SAMSUNG ELECTRONICS CO., LTD. (2)
6,490,199 Sense amplifier circuit for a flash memory device 65 2001
6,731,539 Memory with offset bank select cells at opposite ends of buried diffusion lines 43 2003
 
FUJITSU LIMITED (1)
5,537,356 Nonvolatile semiconductor memory 48 1995
 
SANDISK 3D LLC (1)
6,407,953 Memory array organization and related test method particularly well suited for integrated circuits having write-once memory arrays 147 2001
 
SGS-ATES Componenti Elettronici S.p.A. (1)
4,357,685 Method of programming an electrically alterable nonvolatile memory 209 1980
 
SANDISK CORPORATION (2)
5,095,344 Highly compact EPROM and flash EEPROM devices 668 1988
5,070,032 Method of making dense flash EEprom semiconductor memory structures 450 1989
 
TEXAS INSTRUMENTS INCORPORATED (1)
5,093,806 Sensing and decoding scheme for a BiCMOS read/write memory 65 1989
 
KABUSHIKI KAISHA TOSHIBA (10)
5,418,752 Flash EEPROM system with erase sector select 403 1992
5,570,315 Multi-state EEPROM having write-verify control circuit 731 1994
* 5,650,970 semiconductor memory device having a flash write function 31 1995
5,774,397 Non-volatile semiconductor memory device and method of programming a non-volatile memory cell to a predetermined state 494 1996
5,903,495 Semiconductor device and memory system 289 1997
6,097,638 Semiconductor memory device 90 1998
6,011,287 Non-volatile semiconductor memory device 118 1998
6,046,935 Semiconductor device and memory system 700 1999
6,046,940 Nonvolatile semiconductor memory device 77 1999
6,373,746 Nonvolatile semiconductor memory having plural data storage portions for a bit line connected to memory cells 221 2000
 
SAIFUN SEMICONDUCTORS LTD. (2)
5,768,192 Non-volatile semiconductor memory cell utilizing asymmetrical charge trapping 812 1996
6,011,725 Two bit non-volatile electrically erasable and programmable semiconductor memory cell utilizing asymmetrical charge trapping 1023 1999
 
SANDISK TECHNOLOGIES INC. (6)
5,172,338 Multi-state EEprom read and write circuits and techniques 1096 1990
5,343,063 Dense vertical programmable read only memory cell structure and processes for making them 412 1990
5,315,541 Segmented column memory array 637 1992
5,661,053 Method of making dense flash EEPROM cell array and peripheral supporting circuits formed in deposited field oxide with the use of spacers 382 1994
5,595,924 Technique of forming over an irregular surface a polysilicon layer with a smooth surface 213 1994
6,222,762 Multi-state memory 801 1997
 
STMICROELECTRONICS, INC. (1)
5,949,720 Voltage clamping method and apparatus for dynamic random access memory devices 47 1998
 
NEC ELECTRONICS CORPORATION (1)
5,245,571 Sense amplifier circuit implemented by bipolar transistor and improved in current consumption 47 1991
 
RADIANT TECHNOLOGIES, INC. (1)
5,872,739 Sense amplifier for low read-voltage memory cells 58 1997
 
Datalight, Inc. (1)
5,860,082 Method and apparatus for allocating storage in a flash memory 100 1996
* Cited By Examiner

Patent Citation Ranking

Forward Cite Landscape

Patent Info (Count) # Cites Year
 
Other [Check patent profile for assignment information] (1)
8,971,141 Compact high speed sense amplifier for non-volatile memory and hybrid lockout 0 2013
 
MICRON TECHNOLOGY, INC. (2)
7,423,476 Current mirror circuit having drain-source voltage clamp 3 2006
7,705,664 Current mirror circuit having drain-source voltage clamp 2 2008
 
SANDISK CORPORATION (1)
8,542,529 Non-volatile memory and method with power-saving read and program-verify operations 0 2012
 
KABUSHIKI KAISHA TOSHIBA (10)
7,365,018 Fabrication of semiconductor device for flash memory with increased select gate width 6 2005
7,692,987 Semiconductor storage device 2 2008
8,009,470 Nonvolatile semiconductor memory 6 2009
8,203,888 Non-volatile semiconductor storage device 4 2010
8,223,543 Nonvolatile semiconductor memory 1 2011
8,649,223 Semiconductor storage device 0 2012
8,787,087 Semiconductor memory device controlling operation timing of the sense circuit 0 2012
8,477,534 Nonvolatile semiconductor memory 3 2012
8,559,222 Nonvolatile semiconductor memory 0 2013
8,750,039 Nonvolatile semiconductor memory 0 2013
 
SANDISK TECHNOLOGIES INC. (120)
7,443,757 Non-volatile memory and method with reduced bit line crosstalk errors 5 2002
7,251,160 Non-volatile memory and method with power-saving read and program-verify operations 41 2005
7,366,022 Apparatus for programming of multi-state non-volatile memory using smart verify 12 2005
7,301,817 Method for programming of multi-state non-volatile memory using smart verify 96 2005
7,355,888 Apparatus for programming non-volatile memory with reduced program disturb using modified pass voltages 12 2005
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7,327,619 Reference sense amplifier for non-volatile memory 7 2005
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7,619,922 Method for non-volatile memory with background data latch caching during erase operations 22 2006
7,609,552 Non-volatile memory with background data latch caching during erase operations 1 2006
7,505,320 Non-volatile memory with background data latch caching during program operations 9 2006
7,502,260 Method for non-volatile memory with background data latch caching during program operations 14 2006
7,486,558 Non-volatile memory with managed execution of cached data 2 2006
7,480,181 Non-volatile memory with background data latch caching during read operations 11 2006
7,463,521 Method for non-volatile memory with managed execution of cached data 23 2006
7,447,078 Method for non-volatile memory with background data latch caching during read operations 16 2006
7,376,030 Memory sensing circuit and method for low voltage operation 9 2006
7,391,650 Method for operating non-volatile memory using temperature compensation of voltages of unselected word lines and select gates 12 2006
7,342,831 System for operating non-volatile memory using temperature compensation of voltages of unselected word lines and select gates 86 2006
7,492,633 System for increasing programming speed for non-volatile memory by applying counter-transitioning waveforms to word lines 3 2006
7,349,261 Method for increasing programming speed for non-volatile memory by applying counter-transitioning waveforms to word lines 6 2006
7,489,549 System for non-real time reprogramming of non-volatile memory to achieve tighter distribution of threshold voltages 18 2006
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7,957,185 Non-volatile memory and method with power-saving read and program-verify operations 3 2006
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7,977,186 Providing local boosting control implant for non-volatile memory 1 2006
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7,691,710 Fabricating non-volatile memory with dual voltage select gate structure 4 2006
7,616,490 Programming non-volatile memory with dual voltage select gate structure 6 2006
7,586,157 Non-volatile memory with dual voltage select gate structure 2 2006
7,468,911 Non-volatile memory using multiple boosting modes for reduced program disturb 76 2006
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7,696,035 Method for fabricating non-volatile memory with boost structures 3 2006
7,508,710 Operating non-volatile memory with boost structures 74 2006
7,508,703 Non-volatile memory with boost structures 2 2006
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7,623,386 Reducing program disturb in non-volatile storage using early source-side boosting 4 2006
7,623,387 Non-volatile storage with early source-side boosting for reducing program disturb 4 2006
7,583,535 Biasing non-volatile storage to compensate for temperature variations 16 2006
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7,554,853 Non-volatile storage with bias based on selective word line 1 2006
7,525,843 Non-volatile storage with adaptive body bias 7 2006
7,468,919 Biasing non-volatile storage based on selected word line 14 2006
7,468,920 Applying adaptive body bias to non-volatile storage 8 2006
7,577,037 Use of data latches in cache operations of non-volatile memories 4 2007
7,551,484 Non-volatile memory and method with reduced source line bias errors 0 2007
7,428,171 Non-volatile memory and method with improved sensing 0 2007
7,391,645 Non-volatile memory and method with compensation for source line bias errors 3 2007
7,391,646 Non-volatile memory and method with control gate compensation for source line bias errors 3 2007
7,295,473 System for reducing read disturb for non-volatile storage 12 2007
7,904,793 Method for decoding data in non-volatile storage using reliability metrics based on multiple reads 26 2007
7,797,480 Method for reading non-volatile storage using pre-conditioning waveforms and modified reliability metrics 1 2007
7,606,071 Compensating source voltage drop in non-volatile storage 7 2007
7,606,072 Non-volatile storage with compensation for source voltage drop 2 2007
7,606,079 Reducing power consumption during read operations in non-volatile storage 6 2007
7,440,327 Non-volatile storage with reduced power consumption during read operations 5 2007
7,463,522 Non-volatile storage with boosting using channel isolation switching 1 2007
7,460,404 Boosting for non-volatile storage using channel isolation switching 5 2007
7,447,081 Methods for improved program-verify operations in non-volatile memories 18 2007
7,545,678 Non-volatile storage with source bias all bit line sensing 4 2007
7,539,060 Non-volatile storage using current sensing with biasing of source and P-Well 1 2007
7,532,516 Non-volatile storage with current sensing of negative threshold voltages 2 2007
7,489,554 Method for current sensing with biasing of source and P-well in non-volatile storage 2 2007
7,471,567 Method for source bias all bit line sensing in non-volatile storage 9 2007
7,447,079 Method for sensing negative threshold voltages in non-volatile storage using current sensing 21 2007
7,894,269 Nonvolatile memory and method for compensating during programming for perturbing charges of neighboring cells 4 2007
7,652,929 Non-volatile memory and method for biasing adjacent word line for verify during programming 10 2007
7,577,034 Reducing programming voltage differential nonlinearity in non-volatile storage 2 2007
7,492,634 Method for programming of multi-state non-volatile memory using smart verify 10 2007
7,688,638 Faster programming of multi-level non-volatile storage through reduced verify operations 4 2007
7,609,556 Non-volatile memory with improved program-verify operations 3 2007
7,463,528 Temperature compensation of select gates in non-volatile memory 15 2007
7,460,407 Temperature compensation of voltages of unselected word lines in non-volatile memory based on word line position 4 2007
7,764,547 Regulation of source potential to combat cell source IR drop 5 2007
7,701,761 Read, verify word line reference voltage to track source level 3 2007
* 7,593,265 Low noise sense amplifier array and method for nonvolatile memory 9 2007
7,468,921 Method for increasing programming speed for non-volatile memory by applying direct-transitioning waveforms to word lines 0 2008
7,593,277 Method for compensated sensing in non-volatile memory 1 2008
7,495,956 Reducing read disturb for non-volatile storage 11 2008
7,447,065 Reducing read disturb for non-volatile storage 10 2008
7,440,318 Reducing read disturb for non-volatile storage 11 2008
7,577,026 Source and drain side early boosting using local self boosting for non-volatile storage 0 2008
7,606,076 Sensing in non-volatile storage using pulldown to regulated source voltage to remove system noise 7 2008
7,915,664 Non-volatile memory with sidewall channels and raised source/drain regions 0 2008
8,051,240 Compensating non-volatile storage using different pass voltages during program-verify and read 1 2008
7,719,902 Enhanced bit-line pre-charge scheme for increasing channel boosting in non-volatile storage 2 2008
7,957,197 Nonvolatile memory with a current sense amplifier having a precharge circuit and a transfer gate coupled to a sense node 4 2008
7,499,324 Non-volatile memory and method with control gate compensation for source line bias errors 6 2008
7,800,956 Programming algorithm to reduce disturb with minimal extra time penalty 10 2008
7,796,430 Non-volatile memory using multiple boosting modes for reduced program disturb 4 2008
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8,130,552 Multi-pass programming for memory with reduced data storage requirement 0 2008
7,633,802 Non-real time reprogramming of non-volatile memory to achieve tighter distribution of threshold voltages 78 2008
7,936,602 Use of data latches in cache operations of non-volatile memories 1 2009
7,852,678 Non-volatile memory with improved sensing by reducing source line current 4 2009
7,978,526 Low noise sense amplifier array and method for nonvolatile memory 6 2009
8,284,606 Compensating for coupling during programming 0 2009
8,179,723 Non-volatile memory with boost structures 2 2010
8,054,681 Read, verify word line reference voltage to track source level 0 2010
8,023,322 Non-volatile memory and method with reduced neighboring field errors 1 2010
8,000,146 Applying different body bias to different substrate portions for non-volatile storage 0 2010
8,036,041 Method for non-volatile memory with background data latch caching during read operations 6 2010
* 8,050,126 Non-volatile memory with improved sensing by reducing source line current 0 2010
8,472,280 Alternate page by page programming scheme 5 2010
8,468,424 Method for decoding data in non-volatile storage using reliability metrics based on multiple reads 0 2011
8,400,839 Nonvolatile memory and method for compensating during programming for perturbing charges of neighboring cells 0 2011
8,169,831 High speed sense amplifier array and method for non-volatile memory 2 2011
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8,300,457 Non-volatile memory and method with reduced neighboring field errors 0 2011
8,351,269 Method for non-volatile memory with background data latch caching during read operations 1 2011
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8,300,473 Non-volatile memory with improved sensing by reducing source line current 0 2011
8,411,507 Compensating for coupling during programming 0 2012
8,966,350 Providing reliability metrics for decoding data in non-volatile storage 0 2013
 
SANDISK IL LTD. (4)
7,679,965 Flash memory with improved programming precision 2 2007
7,660,166 Method of improving programming precision in flash memory 1 2007
8,073,648 Measuring threshold voltage distribution in memory using an aggregate characteristic 1 2007
7,613,045 Operation sequence and commands for measuring threshold voltage distribution in memory 14 2007
* Cited By Examiner

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