Multi level flash memory device and program method
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United States of America Patent
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May 30, 2006
Grant Date -
Sep 1, 2005
app pub date -
Dec 22, 2004
filing date -
Feb 26, 2004
priority date (Note) -
Expired
status (Latency Note)
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Abstract
We describe a multi level flash memory device and program method. The multi level flash memory device includes a plurality of memory cells, each storing an amount of charge indicative of more than two possible states and control circuitry coupled to the memory cells. The control circuitry to applying a programming voltage alternating with a verification voltage to the memory cells until all are at a desired state and applying at least one additional programming voltage to the cells in a highest state without applying a verification voltage. The method includes applying at least one programming pulse to the cells, verifying that each cell has reached the desired state, selecting the cells that are programmed for a highest state, and applying at least one additional programming pulse to the selected cells without further verifying their state.
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