Three-state memory cell

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United States of America Patent

PATENT NO 7057941
SERIAL NO

10697957

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Abstract

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A memory cell with at least two detectable states among which is an unprogrammed state, comprising, in series between two terminals of application of a read voltage, at least one first branch comprising: a pre-read stage comprising, in parallel, two switchable resistors having different values with a first predetermined difference; and a programming stage formed of a polysilicon programming resistor, a terminal of the programming resistor being accessible by a programming circuit capable of causing an irreversible decrease in its value.

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Patent Owner(s)

Patent OwnerAddress
STMICROELECTRONICS S AFRANCE

International Classification(s)

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Wuidart, Luc Pourrieres, FR 83 1226
Wuidart, Sylvie Pourrieres, FR 41 230

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