Member for semiconductor package and semiconductor package using the same, and fabrication method thereof
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United States of America Patent
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Jul 4, 2006
Grant Date -
Jun 5, 2003
app pub date -
Dec 30, 2002
filing date -
Oct 14, 1998
priority date (Note) -
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status (Latency Note)
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Abstract
A member for a semiconductor package and a semiconductor package using the member, and a method for fabricating the semiconductor package are provided to simply connect chip pads provided on a semiconductor chip to external terminals. With the member for the semiconductor package and the package using the member according to the present invention, the chip pads can simply be connected with the corresponding external terminals. In addition, since the electrical paths between the chip pads and the external leads are relatively shortened, thus the electric properties are improved. Further, since the external terminal balls can be arranged regardless of the location of the chip pads, the semiconductor package can be easily designed and the size of the package can approximate the chip size and the plurality of external balls can be provided. Also, since it is possible to perform the package process with either the wafer or the individual chip, an application range can be flexibly extended.
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