US Patent No: 7,078,987

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Narrow band-pass tuned resonator filter topologies having high selectivity, low insertion loss and improved out-of-band rejection over extended frequency ranges

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Abstract

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A tuned resonator circuit topology is disclosed that permits implementation of narrow band-pass filters having high loaded Q and optimal coupling (for low insertion loss) using a parallel tuned resonator topology at frequencies in the 1 to 2 GHz range and beyond. The topology consists of a mirror image of the parallel tuned circuit about the signal line of a conventional parallel tuned circuit to effect a cancellation of virtually all of the induced currents between the inductive elements of the resonators. This reduction in induced currents reduces the magnetic coupling between the resonators, thereby offsetting the increase in overall coupling between the resonators as frequency increases, and thereby serves to maintain optimal coupling between the resonators as the frequency of operation increases. Moreover, the mirror image topology increases the parallelism between the inductive elements in the resonators, thereby decreasing the inductance values and permitting an increase in capacitance values. Increasing the capacitance values of the resonators effectively offsets the decrease in the loaded Q as frequency is increased. The topology works for any number of parallel resonators. As the resolution of the manufacturing process decreases (e.g. from printed circuit board to integrated circuit processes), the range of operating frequencies scales with the increase in resolution.

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Patent Owner(s)

Patent OwnerAddressTotal Patents
GENERAL INSTRUMENT CORPORATIONHORSHAM, PA661

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Petrovic, Branislav A La Jolla, CA 15 66

Cited Art Landscape

Patent Info (Count) # Cites Year
 
MURATA MANUFACTURING CO., LTD. (1)
5,898,403 Antenna formed of multiple dielectric substrates including shielded LC filter 66 1995

Patent Citation Ranking

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Patent Info (Count) # Cites Year
 
MENTOR GRAPHICS CORPORATION (6)
8,161,438 Determining mutual inductance between intentional inductors 4 2006
8,549,449 Mutual inductance extraction using dipole approximations 2 2009
8,214,788 High-frequency VLSI interconnect and intentional inductor impedance extraction in the presence of a multi-layer conductive substrate 2009
8,650,522 Determining mutual inductance between intentional inductors 0 2012
8,732,648 High-frequency VLSI interconnect and intentional inductor impedance extraction in the presence of a multi-layer conductive substrate 0 2012
8,826,204 Mutual inductance extraction using dipole approximations 0 2013

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