Non-volatile multi-level, semiconductor flash memory device and method of driving same
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United States of America Patent
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Jul 18, 2006
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app pub date -
Jan 25, 2005
filing date -
Jul 28, 1998
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Abstract
In a nonvolatile semiconductor memory device in which a plurality of threshold values are set to store multi-level data in a memory cell, bits of multi-bit data are separately written into a memory cell according to an address signal or a control signal to effect the reading and erasing. Concretely, the memory array is so constituted that it can be accessed by three-dimensional address of X, Y and Z, and multi-bit data in the memory cell is discriminated by the Z-address.
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