Ferroelectric memory input/output apparatus
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United States of America Patent
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Jul 25, 2006
Grant Date -
Aug 25, 2005
app pub date -
Apr 18, 2005
filing date -
Dec 3, 2001
priority date (Note) -
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Abstract
A memory system. The system includes at least two ferroelectric memory devices arranged sequentially. Each memory device has a data in signal and a data out signal, and the data out signal each memory device is transmitted as the data in signal of the next device in sequence. A system controller generates an initial data in signal for the first memory device. A data bus transfers data between each memory device and the system controller and an address bus provide addressing of the memory devices.
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