Method and device for estimating time errors in time interleaved A/D converter system
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United States of America Patent
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Aug 1, 2006
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N/A
app pub date -
Jul 15, 2005
filing date -
Jan 15, 2003
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Abstract
A device estimates time errors in a time interleaved A/D converter system. To this end an output signal (y1, y2, . . . , yM) is fed to a correction device (5), that is provided to correct the signals with an estimated time error and to produce M signals (z1, z2, . . . , zM). These signals are used in an estimation algorithm device to estimate the time error and the time estimated time errors are then fed to the correction device (5).
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