Clock control apparatus and method, for a memory controller, that processes a block access into single continuous macro access while minimizing power consumption
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United States of America Patent
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Aug 1, 2006
Grant Date -
Oct 23, 2003
app pub date -
Apr 16, 2003
filing date -
Apr 17, 2002
priority date (Note) -
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Abstract
A clock control apparatus for a memory controller comprises an interface unit which processes a block access to a plurality of banks of an SDRAM as a single continuous macro access in order to perform arbitration of the macro access, the block access externally supplied to the memory controller. A power-saving control unit controls both a clock signal of an internal circuit of the memory controller and a clock enable signal of the SDRAM in response to a control signal supplied from the interface unit.
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