ECC based system and method for repairing failed memory elements
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United States of America Patent
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Aug 1, 2006
Grant Date -
May 1, 2003
app pub date -
Oct 25, 2001
filing date -
Oct 25, 2001
priority date (Note) -
Expired
status (Latency Note)
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Abstract
An ECC based system and method within an integrated circuit memory for self-repair of a failed memory element is disclosed. The method includes processing, within the integrated circuit, data and check bits retrieved from addressed memory locations therein. The locations of memory failures are automatically recorded within the integrated circuit. Logic circuits within the integrated circuit automatically identify failure patterns based on the locations. Based on the identified failure patterns, logic circuits within the integrated circuit then permanently replace a failed memory element with an appropriate redundancy element, using devices such as electronic fuse or antifuse. In this manner, the integrated circuit automatically identifies and effects self repair of a failed memory element therein.
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