Clock multiplier selection for a microprocessor with multiple system bus clocking frequencies
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United States of America Patent
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Aug 8, 2006
Grant Date -
Oct 31, 2002
app pub date -
Feb 27, 2001
filing date -
Feb 27, 2001
priority date (Note) -
Expired
status (Latency Note)
Importance
Abstract
Clock multiplier selection methods and apparatuses. One embodiment includes a clock interface to receive a clock signal, a frequency detect circuit, and a multiplier selection circuit. The frequency detect circuit detects an operating frequency of the clock signal and the multiplier selection circuit selects a clock multiplier that is a function of the operating frequency of the clock signal.
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