Handling node address failure in a distributed nodal system of processors

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United States of America Patent

PATENT NO 7092990
APP PUB NO 20040010568A1
SERIAL NO

10179186

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ATTORNEY / AGENT: (SPONSORED)

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Abstract

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Addressing failure is handled in a nodal system of processor nodes, which comprise at least one processor and at least one interface to a network. Upon detection of a node address failure of a processor node for the network, such as lack of a node address, or presence of a duplicate address, the processor node is disabled from the network, thereby temporarily failing the processor node so that the system remains operational. An alternate node address stored in nonvolatile memory may be selected that avoids the node address failure.

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Patent Owner(s)

Patent OwnerAddress
INTERNATIONAL BUSINESS MACHINES CORPORATIONNEW ORCHARD ROAD ARMONK NY 10504

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Goodman, Brian Gerard Tucson, AZ 82 3028
Hill, Jr Ronald Faye Tucson, AZ 7 215
Jesionowski, Leonard George Tucson, AZ 76 2764
Yardy, Raymond Tucson, AZ 66 1032

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