Model-based logic design
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United States of America Patent
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Aug 15, 2006
Grant Date -
Mar 6, 2003
app pub date -
Aug 28, 2001
filing date -
Aug 28, 2001
priority date (Note) -
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status (Latency Note)
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Abstract
A technique for designing a logic circuit includes specifying a model. The model including combinatorial blocks, state elements and graphical library elements. The technique maintains a data structure representative of the model, and generates an architectural model and an implementation model from the data structure. The data structure represents a descriptive net list of the model. The architectural model includes C++ code and the implementation model includes Verilog.
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