Interpolator circuit
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United States of America Patent
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Sep 5, 2006
Issued Date -
N/A
app pub date -
Jun 30, 2005
filing date -
May 9, 2003
priority date (Note) -
Expired
status (Latency Note)
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Abstract
An improved interpolator includes a replica delay line and an interpolated delay edge generator. The replica delay line provides two replica delay edges to the interpolated delay edge generator. The interpolated delay edge generator selectively generates an interpolated delay edge while maintaining a substantially constant capacitive loading on the two replica delay edges. The replica delay line may comprise a delay cell of four current-starved inverter delay stages or four capacitor-loaded inverter delay stages.
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