Circuit arrangement and data processing method
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United States of America Patent
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Sep 5, 2006
Grant Date -
Dec 30, 2004
app pub date -
Jun 10, 2004
filing date -
Dec 12, 2001
priority date (Note) -
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status (Latency Note)
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Abstract
A circuit arrangement in which two parallel subcircuits having a same functionality have a same input signal applied to them, and their output signals are compared in a common comparison arrangement. The two subcircuits are designed differently in terms of sensitivity to changes in environmental or operating parameters. Impermissible environmental parameters are indicated if the output signals differ from one another, and an alarm is generated.
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