Programmable termination with DC voltage level control
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United States of America Patent
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Sep 19, 2006
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app pub date -
Sep 13, 2005
filing date -
Dec 11, 2001
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Abstract
Various embodiments for implementing circuits and systems with highly flexible interface circuitry that is capable of realizing programmable on-chip termination and DC level control. A number of techniques use existing I/O resources to implement programmable on-chip termination and DC level control that enable an integrated circuit to meet a variety of different high speed single-ended and differential I/O standards.
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