Integrated circuit die and an electronic assembly having a three-dimensional interconnection scheme
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United States of America Patent
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Sep 26, 2006
Issued Date -
N/A
app pub date -
Nov 23, 2004
filing date -
Mar 28, 2002
priority date (Note) -
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status (Latency Note)
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Abstract
An electronic assembly is assembled by stacking two or more integrated circuit dies on top of one another. Prior to singulation, an opening is laser-drilled into an upper die, and subsequently filled with a conductive member. The conductive member is located on a lower die and interconnects integrated circuits of the upper and lower dies. Laser-drilling allows for faster throughput when compared to, for example, etching, especially if a small number of openings has to be formed. The opening is laser-drilled from an upper surface of the upper die all the way through the die, which allows for the use of alignment marks on an upper surface of the upper die.
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