Nonvolatile memory with program while program verify
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United States of America Patent
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Oct 31, 2006
Grant Date -
N/A
app pub date -
Sep 26, 2005
filing date -
Sep 26, 2005
priority date (Note) -
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Abstract
A page mode program sequence is described that includes first and second bias applying cycles. In the first cycle, a program bias is applied to a first part of a page of memory cells, while a program verify bias is applied to, and data is sensed from, a second part of the page. In this manner, a first part of the page is programmed, while a second part of the page is verified. This operation is followed by a second bias applying cycle, in which a program bias is applied to the second part of the page, while a program verify bias is applied to, and data is sensed from, the first part of the page.
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