US Patent No: 7,132,718
Number of patents in Portfolio can not be more than 2000
Fabrication method and structure of semiconductor non-volatile memory device
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Nov 7, 2006
Issued date -
Dec 4, 2003
filing date -
10/726,507
serial no -
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Abstract
A non-volatile semiconductor memory device with good write/erase characteristics is provided. A selection gate is formed on a p-type well of a semiconductor substrate via a gate insulator, and a memory gate is formed on the p-type well via a laminated film composed of a silicon oxide film, a silicon nitride film, and a silicon oxide film. The memory gate is adjacent to the selection gate via the laminated film. In the regions on the both sides of the selection gate and the memory gate in the p-type well, n-type impurity diffusion layers serving as the source and drain are formed. The region controlled by the selection gate and the region controlled by the memory gate located in the channel region between said impurity diffusion layers have the different charge densities of the impurity from each other.
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First Claim
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International Classification(s)
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Cited Art
| Patent Info | (Count) | # Cites | Year |
|---|---|---|---|
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| 5,969,383 Split-gate memory device and method for accessing the same | 234 | 1997 | |
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| 6,888,198 Straddled gate FDSOI device | 27 | 2001 | |
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| 6,388,293 Nonvolatile memory cell, operating method of the same and nonvolatile memory array | 97 | 2000 | |
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| 6,815,279 Manufacturing method of CMOS devices | 14 | 2001 | |
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| 6,184,553 Nonvolatile semiconductor memory device and method for fabricating the same, and semiconductor integrated circuit device | 5 | 1999 | |
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| 6,449,189 Flash memory cell for high efficiency programming | 20 | 2001 | |
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| 6,768,165 Two bit non-volatile electrically erasable and programmable semiconductor memory cell utilizing asymmetrical charge trapping | 70 | 1997 | |
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| 5,977,591 High-voltage-resistant MOS transistor, and corresponding manufacturing process | 59 | 1997 | |
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| 6,911,691 Nonvolatile semiconductor memory device | 16 | 2002 | |
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| 5,877,523 Multi-level split- gate flash memory cell | 55 | 1997 | |
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| 5,821,581 Non-volatile memory cell structure and process for forming same | 21 | 1993 | |
Patent Citation Ranking
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