Operational frequency range of latch circuits
Number of patents in Portfolio can not be more than 2000
United States of America Patent
Stats
-
Nov 28, 2006
Grant Date -
Dec 22, 2005
app pub date -
Jun 18, 2004
filing date -
Jun 27, 2003
priority date (Note) -
Expired
status (Latency Note)
Importance
Abstract
Described herein is a latch circuit (110) which has an improved maximum toggle rate or frequency. The latch circuit (110) includes a first portion (116) and a second portion (62) in which input clock signals (52,54) are applied to respective input transistors (118,78). The input transistor (118) for the first portion (116) has an emitter area which is double that of the input transistor (78) for the second portion (62). This `imbalance` between the two input transistors (118,78) provides an increase in the `hold period/follow period` ratio such that it is greater than 1, the self-resonance of the latch circuit (110) and also maximum toggle rate or frequency.
First Claim
Family
International Classification(s)
Cited Art Landscape
Patent Citation Ranking
Advertisement
Advertisement
Advertisement
Recipient Email Address
Recipient Email Address
Comment
Recipient Email Address
Add to Portfolio(s)
To add this patent to one, or more, of your portfolios, simply click the add button.
This Patent is in these Portfolios:
Add to additional portfolios:
Last Refreshed On:
Changes done successfully