Method for layout of gridless non manhattan integrated circuits with tile based router
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United States of America Patent
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Nov 28, 2006
Issued Date -
N/A
app pub date -
Dec 31, 2002
filing date -
Jun 3, 2001
priority date (Note) -
Expired
status (Latency Note)
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Abstract
The present invention introduces a method for implementing a gridless non Manhattan router by modifying an existing gridless Manhattan router. In the method of the present invention, a tile based router that uses tiles to represent circuit geometry or free space between circuit geometry is first selected. Next, at least one tile routing layer of the tile based router is rotated to implement a diagonal wiring layer. The code of the router is then adjusted to ensure that a via that will connect a Manhattan layer to a non Manhattan layer (a diagonal layer) will fit within a tile on both layers.
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