Method of fabricating no-lead package for semiconductor die with half-etched leadframe

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United States of America Patent

PATENT NO 7153724
SERIAL NO

10637965

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Abstract

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A series of grooves are etched in a leadframe to be used in fabricating a group of semiconductor packages at locations where the leadframe will later be sawed to separate the semiconductor packages. In variations of the process, the grooves may be wider or narrower than the kerf of the saw cuts and may be formed on the side of the leadframe facing towards or away from the entry of the saw blade.

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Patent Owner(s)

Patent OwnerAddress
UTAC HEADQUARTERS PTE LTD22 ANG MO KIO INDUSTRIAL PARK 2 SINGAPORE 569506

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Chua, Yee Heong Singapore, SG 4 121
Jewjaitham, Sitta Bangkok, TH 2 119
Nondhasitthichai, Somchai Bangkok, TH 36 383
Sirinorakul, Saravuth Bangkok, TH 79 565

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