Comparators capable of output offset calibration

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United States of America Patent

PATENT NO 7154294
SERIAL NO

11063762

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Abstract

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Comparators outputting offset calibration. A MOS current mode logic (MCML) circuit receives input signals and generates differential logic signals on output terminals thereof, and comprises a calibration unit coupled to the output terminals, calibrating output offsets at the output terminals according to digital calibration codes. An output stage is coupled to the differential logic signals at the output terminals of the MCML circuit to amplify the differential logic signal and generating a comparison resulting signal. By adjusting the digital calibration codes applied to the calibration unit, current on the output terminals can be adjusted, such that output offsets at the output terminals of the MCML circuit 10 can be eliminated.

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Patent Owner(s)

Patent OwnerAddress
VIA TECHNOLOGIES INCNEW TAIPEI CITY

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Bi, Joe Beijing, CN 2 80
Li, Ken-Ming Taipei, TW 20 374
Liu, Zhongding Beijing, CN 10 104
Pan, Gray Beijing, CN 1 66
Yang, Gary Beijing, CN 9 194

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