Systems and methods for implementing delay line circuitry
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United States of America Patent
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Jan 2, 2007
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N/A
app pub date -
Aug 20, 2004
filing date -
Aug 20, 2004
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Abstract
Memory devices used to control delay line circuitry, and that may be implemented in one embodiment to provide a self-tuning delay line device using empirical calibration technique/s to achieve a desired signal delay. The memory control device may be implemented to store electrical characteristics of the delay line circuitry during testing to enable self-calibration of the delay line circuitry.
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