Configurable architecture for virtual socket client to an on-chip bus interface block
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United States of America Patent
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-
Jan 2, 2007
Grant Date -
N/A
app pub date -
Nov 2, 1999
filing date -
Nov 2, 1999
priority date (Note) -
Expired
status (Latency Note)
Importance
Abstract
An interface block provides an interface between an internal bus of an integrated circuit and a socket of a logic block. The interface block includes a synchronization module that performs any needed synchronization between a clock domain of the internal bus and a clock domain of the socket of the logic block. A translation module provides translation of block encoding of the data for data transferred between the internal bus and the socket of the logic block. A queue module buffers data flowing between the internal bus and the socket of the logic block. A driver module handles low level and electrical drive specifications of the internal bus.
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