Semiconductor memory and method of testing the same

Number of patents in Portfolio can not be more than 2000

United States of America Patent

PATENT NO 7162660
APP PUB NO 20040042293A1
SERIAL NO

10387520

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Abstract

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A memory section includes an array of a plurality of memory elements, an address selecting circuit, a data selecting circuit having a data writing section for being driven for writing or reading normal data or test data, and a data reading section for generating an output to represent a positive and a negative of a read value of stored data from the memory elements. A memory controlling section includes a computing means for inputting/outputting, computing, storing, or controlling data and control information, a nonvolatile defect-and-fault recovery table used for holding an inherent history of a semiconductor memory, registering a detected defect or fault, and mapping the memory element by the unit of address or by the unit of data selection path of the memory element to a registered alternative address or data selection path, and a controlling and storing means for storing data, information for control or test, or a processing procedure.

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Patent Owner(s)

Patent OwnerAddress
OGINO HIROYUKINot Provided

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Ogino, Hiroyuki Kamigyo-ku, Kyoto City, Kyoto, JP 111 1575

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