Adjusting die placement on a semiconductor wafer to increase yield

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United States of America Patent

PATENT NO 7169638
SERIAL NO

10802549

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Abstract

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A die placement of dice to be formed on a semiconductor wafer is adjusted by obtaining a die placement and one or more locations on the wafer contacted by one or more processing structures or a substance emitted by one or more processing structures. The die placement is adjusted based on the obtained one or more locations on the wafer.

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Patent Owner(s)

Patent OwnerAddress
PDF SOLUTIONS INC2858 DE LA CRUZ BOULEVARD SANTA CLARA CA 95050

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Cadouri, Eitan Cupertino, CA 17 301

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