Cache flush system and method thereof
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United States of America Patent
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Jan 30, 2007
Grant Date -
Jun 24, 2004
app pub date -
Dec 10, 2003
filing date -
Dec 24, 2002
priority date (Note) -
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Abstract
The present invention relates to a cache flush system and the method for a cache flush performed in cache memory against at least one corresponding prescribed event in a multi-processor system. Embodiments of the present invention can reduce or minimize loads of a processor bus by performing memory read of at most a prescribed size and can increase simultaneousness of cache flush against a corresponding prescribed event by performing a cache flush directly triggered by the prescribed event thereby enabling high speed and automated cache flush algorithm.
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