Method of manufacturing self aligned non-volatile memory cells
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United States of America Patent
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Feb 27, 2007
Grant Date -
Sep 15, 2005
app pub date -
Mar 12, 2004
filing date -
Mar 12, 2004
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Abstract
A method of forming an array of non-volatile memory cells includes forming a plurality of floating gate structures and shaping the plurality of floating gate structures to reduce the width of upper parts of floating gate structures. A first process forms floating gates by etching an upper portion of a polysilicon structure with masking elements in place to shape the floating gate. A second process etches recesses and protrusions in a polysilicon structure prior to etching the structure to form individual floating gates.
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