Reliability circuit for applying an AC stress signal or DC measurement to a transistor device
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United States of America Patent
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Feb 27, 2007
Grant Date -
Apr 13, 2006
app pub date -
Oct 11, 2004
filing date -
Oct 11, 2004
priority date (Note) -
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Abstract
An integrated circuit is provided, which includes a transistor device under test, an AC drive circuit, an AC bias circuit and a DC bias circuit. The AC drive circuit generates an AC drive signal. The AC bias circuit biases the transistor device under AC bias conditions in response to the AC drive signal. The DC bias circuit biases the transistor device under DC bias conditions. A switch circuit selectively couples the transistor device to the AC bias circuit in an AC stress mode and to the DC bias circuit in a DC measurement mode.
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