Edge intensive antifuse
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United States of America Patent
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Mar 13, 2007
Grant Date -
Feb 5, 2004
app pub date -
Apr 8, 2003
filing date -
Aug 1, 2002
priority date (Note) -
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status (Latency Note)
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Abstract
An antifuse including a bottom plate having a plurality of longitudinal members arranged substantially parallel to a first axis, a dielectric layer formed on the bottom plate, and a top plate having a plurality of longitudinal members arranged substantially parallel to a second axis, the top plate formed over the dielectric layer. Multiple edges formed at the interfaces between the top and bottom plates result in regions of localized charge concentration when a programming voltage is applied across the antifuse. As a result, the formation of the antifuse dielectric over the corners of the bottom plates enhance the electric field during programming of the antifuse. Reduced programming voltages can be used in programming the antifuse and the resulting conductive path between the top and bottom plates will likely form along the multiple edges.
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