Multi-chip circuit module and method for producing the same
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United States of America Patent
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Mar 20, 2007
Grant Date -
Oct 14, 2004
app pub date -
Apr 29, 2004
filing date -
Nov 22, 2001
priority date (Note) -
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status (Latency Note)
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Abstract
A multi-chip circuit module on which semiconductor chips are loaded and which is provided with circuit patterns, input/output terminals or the like for interconnecting the semiconductor chips. A multi-layered wiring section (2) is formed by respective unit wiring layers (8) to (12) in such a manner that an upper unit wiring layer is layered on a surface-planarized subjacent unit wiring layer and connected to one another by inter-layer connection by a via-on-via structure. A semiconductor chip (6) mounted on this multi-layer wiring section (2) is polished along with the sealing resin layer (7) for reducing the thickness.
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