Integrated circuit memory device having write latency function
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United States of America Patent
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Mar 27, 2007
Issued Date -
N/A
app pub date -
Feb 15, 2005
filing date -
Oct 10, 1997
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Abstract
A memory device includes an interconnect with mask pins and a memory core for storing data. A memory interface circuit is connected between the interconnect and the memory core. The memory interface circuit selectively processes write mask data from the mask pins or precharge instruction signals from the mask pins.
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