Junction-isolated depletion mode ferroelectric memory devices and systems
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United States of America Patent
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Apr 3, 2007
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Apr 4, 2005
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Aug 31, 2000
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Abstract
Depletion-mode ferroelectric transistors are adapted for use as non-volatile memory cells for memory devices and electronic systems. Various embodiments are described having a diode interposed between the bit line and a source/drain region of the transistor for added margin against read disturb.
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